Test
|
PORT_A | my_low_level_component | [Port] |
PORT_B | my_low_level_component | [Port] |
PORT_Q | my_low_level_component | [Port] |
U_INST_A | my_top_level::rtl | [Component Instantiation] |
U_INST_B | my_top_level::rtl | [Component Instantiation] |