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defines and configuration of AT91SAM7X STPCLKDIR driver More...
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Defines | |
#define | STPCLKDIR_CLOCKWISE (TRUE) |
Direction: clockwise | |
#define | STPCLKDIR_COUNTERCLOCKWISE (FALSE) |
Direction: counter-clockwise | |
#define | STPCLKDIR_CLKSACC_MIN (2) |
Move: min acceleration clocks | |
#define | STPCLKDIR_CLKSBRK_MIN (1) |
Move: min brake clocks | |
#define | STPCLKDIR_CLKSRUN_MIN (STPCLKDIR_CLKSACC_MIN+ STPCLKDIR_CLKSBRK_MIN) |
Move: min run clocks (at least the sum of acceleration and brake) | |
#define | STPCLKDIR_FLAGS_NONE (0) |
Flag/option: all options off/disabled | |
#define | STPCLKDIR_FLAGS_AUTOPOWEROFF (1 << 0) |
Flag/option: power off drive after move | |
#define | STPCLKDIR_FLAGS_INVERSE (1 << 1) |
Flag/option: inverse motor direction (e.g. clockwise bit will turn counter-clockwise) | |
#define | STPCLKDIR_ISRTCC_FUNC(unit) void IsrStpClkDirTcc##unit(void) __irq { StpClkDirTccIrqHandler(unit); } |
#define | STPCLKDIR_ISRTCC_PROTO(unit) void IsrStpClkDirTcc##unit(void) __irq |
#define | STPCLKDIR_ISRTCC_NAME(unit) IsrStpClkDirTcc##unit |
#define | STPCLKDIR_ISRPWM_FUNC void IsrStpClkDirPwm(U32 u32ISR, U32 u32Pin) { StpClkDirPwmIrqHandler(u32Pin); } |
#define | STPCLKDIR_ISRPWM_PROTO void IsrStpClkDirPwm(U32 u32ISR, U32 u32Pin) |
#define | STPCLKDIR_ISRPWM_NAME IsrStpClkDirPwm |
#define | STPCLKDIR_POWERONRESET 0 |
Overrideable configuration: power on reset of hardware driver before every move | |
#define | STPCLKDIR_FULLSTEPSHIFT 1 |
Overrideable configuration: full step shift to avoid position error at power off | |
#define | STPCLKDIR_OFFSETAUTOSHIFT 1 |
Overrideable configuration: control auto offset shift after move from received edge offset(s) | |
#define | STPCLKDIR_OFFSETBYDIRECTION 0 |
Overrideable configuration: offset inversion by direction | |
#define | STPCLKDIR_PWM_2NDCHANCEUPDATE_FIX 1 |
Overrideable configuration: pwm 2nd chance preventive update error fix | |
#define | STPCLKDIR_PWM_UPDATE_FIX 0 |
Overrideable configuration: pwm update fix (Errata rev. a 41.3.6 p.653) | |
#define | STPCLKDIR_STACK_STKTSKSTPCLKDIRHOLD 512 |
Overrideable configuration: default stack size for TskStpClkDirHold | |
#define | STPCLKDIR_MBXOFFSETCNTMSG 25 |
Overrideable configuration: number of offset corrections buffered | |
#define | STPCLKDIR_MBXCNTSTATE 4 |
Overrideable configuration: number of state changes buffered | |
#define | STPCLKDIR_UNIT_MAX 1 |
Overrideable configuration: number of units supported simultaneously | |
#define | STPCLKDIR_MBXCNTACC 512 |
Overrideable configuration: number of entries for acceleration mailbox | |
#define | STPCLKDIR_MBXCNTBRK 512 |
Overrideable configuration: number of entries for brake mailbox | |
Functions | |
void | StpClkDirTccIrqHandler (UCHAR ucUnit) |
void | StpClkDirPwmIrqHandler (UCHAR ucChid) |
__task void | TskStpClkDirHold (void *pvParam) |
STPCLKDIR_ISRTCC_PROTO (0) | |
Variables | |
STPCLKDIR_ISRPWM_PROTO |
defines and configuration of AT91SAM7X STPCLKDIR driver
#define STPCLKDIR_CLKSACC_MIN (2) |
Move: min acceleration clocks
#define STPCLKDIR_CLKSBRK_MIN (1) |
Move: min brake clocks
Move: min run clocks (at least the sum of acceleration and brake)
#define STPCLKDIR_CLOCKWISE (TRUE) |
Direction: clockwise
#define STPCLKDIR_COUNTERCLOCKWISE (FALSE) |
Direction: counter-clockwise
#define STPCLKDIR_FLAGS_AUTOPOWEROFF (1 << 0) |
Flag/option: power off drive after move
#define STPCLKDIR_FLAGS_INVERSE (1 << 1) |
Flag/option: inverse motor direction (e.g. clockwise bit will turn counter-clockwise)
#define STPCLKDIR_FLAGS_NONE (0) |
Flag/option: all options off/disabled
#define STPCLKDIR_FULLSTEPSHIFT 1 |
Overrideable configuration: full step shift to avoid position error at power off
#define STPCLKDIR_ISRPWM_FUNC void IsrStpClkDirPwm(U32 u32ISR, U32 u32Pin) { StpClkDirPwmIrqHandler(u32Pin); } |
#define STPCLKDIR_ISRPWM_NAME IsrStpClkDirPwm |
#define STPCLKDIR_ISRPWM_PROTO void IsrStpClkDirPwm(U32 u32ISR, U32 u32Pin) |
#define STPCLKDIR_ISRTCC_FUNC | ( | unit | ) | void IsrStpClkDirTcc##unit(void) __irq { StpClkDirTccIrqHandler(unit); } |
#define STPCLKDIR_ISRTCC_NAME | ( | unit | ) | IsrStpClkDirTcc##unit |
#define STPCLKDIR_ISRTCC_PROTO | ( | unit | ) | void IsrStpClkDirTcc##unit(void) __irq |
#define STPCLKDIR_MBXCNTACC 512 |
Overrideable configuration: number of entries for acceleration mailbox
#define STPCLKDIR_MBXCNTBRK 512 |
Overrideable configuration: number of entries for brake mailbox
#define STPCLKDIR_MBXCNTSTATE 4 |
Overrideable configuration: number of state changes buffered
#define STPCLKDIR_MBXOFFSETCNTMSG 25 |
Overrideable configuration: number of offset corrections buffered
#define STPCLKDIR_OFFSETAUTOSHIFT 1 |
Overrideable configuration: control auto offset shift after move from received edge offset(s)
#define STPCLKDIR_OFFSETBYDIRECTION 0 |
Overrideable configuration: offset inversion by direction
#define STPCLKDIR_POWERONRESET 0 |
Overrideable configuration: power on reset of hardware driver before every move
#define STPCLKDIR_PWM_2NDCHANCEUPDATE_FIX 1 |
Overrideable configuration: pwm 2nd chance preventive update error fix
#define STPCLKDIR_PWM_UPDATE_FIX 0 |
Overrideable configuration: pwm update fix (Errata rev. a 41.3.6 p.653)
#define STPCLKDIR_STACK_STKTSKSTPCLKDIRHOLD 512 |
Overrideable configuration: default stack size for TskStpClkDirHold
#define STPCLKDIR_UNIT_MAX 1 |
Overrideable configuration: number of units supported simultaneously
STPCLKDIR_ISRTCC_PROTO | ( | 0 | ) |
void StpClkDirPwmIrqHandler | ( | UCHAR | ucChid | ) |
void StpClkDirTccIrqHandler | ( | UCHAR | ucUnit | ) |
__task void TskStpClkDirHold | ( | void * | pvParam | ) |