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Variables

Constants

STATUS_REGISTER  RegisterLocation := init ( " exmaple_status " , REG_COMPONENT_START_ADDR + toInt ( x " 01 " ) , 8 , RO_STATUS_REG_CFG )
ALMOST_FULL_BIT  RegisterBit := FIFO_WR_ALMOST_FULL_BIT
FULL_BIT  RegisterBit := FIFO_WR_FULL_BIT
ALMOST_EMPTY_BIT  RegisterBit := FIFO_RD_ALMOST_EMPTY_BIT
EMPTY_BIT  RegisterBit := FIFO_RD_EMPTY_BIT

Detailed Description

Example custom loacal status register. Reuse FIFOPkg bit defines to promote consistancy. All status bits are tied to the input FIFO. In many cases you will not want to reuse the FIFO bits, that is up to you as every component may have more than one FIFO.

Variable Documentation

STATUS_REGISTER RegisterLocation := init ( " exmaple_status " , REG_COMPONENT_START_ADDR + toInt ( x " 01 " ) , 8 , RO_STATUS_REG_CFG )
Constant

Definition at line 334 of file ExampleComponent.vhd.

ALMOST_FULL_BIT RegisterBit := FIFO_WR_ALMOST_FULL_BIT
Constant

Input FIFO write side is almost full

Definition at line 336 of file ExampleComponent.vhd.

FULL_BIT RegisterBit := FIFO_WR_FULL_BIT
Constant

Input FIFO write side is full

Definition at line 338 of file ExampleComponent.vhd.

ALMOST_EMPTY_BIT RegisterBit := FIFO_RD_ALMOST_EMPTY_BIT
Constant

Input FIFO read side is almost empty

Definition at line 340 of file ExampleComponent.vhd.

EMPTY_BIT RegisterBit := FIFO_RD_EMPTY_BIT
Constant

Input FIFO read side is empty

Definition at line 342 of file ExampleComponent.vhd.