Ports | |
in | |
out | |
in | |
out | |
Includes | |
C_ADDSUB_V1_0 | |
C_MUX_BUS_V1_0 | |
C_COMPARE_V1_0 | |
C_MUX_BIT_V1_0 | |
C_MEM_DP_BLOCK_V1_0 | |
C_REG_FD_V1_0 | |
Inputs | |
in | [ 7 : 0 ] |
in | [ 7 : 0 ] |
Outputs | |
out | [ 7 : 0 ] |
out | [ 7 : 0 ] |
Components | |
u0 | xilinx_inc8 |
Definition at line 182 of file primitives.v.
in [Ports] |
Definition at line 182 of file primitives.v.
out [Ports] |
Definition at line 182 of file primitives.v.
in [ 7 : 0 ] [Inputs] |
Definition at line 183 of file primitives.v.
out [ 7 : 0 ] [Outputs] |
Definition at line 184 of file primitives.v.
in [Ports] |
Definition at line 928 of file primitives_xilinx.v.
out [Ports] |
Definition at line 928 of file primitives_xilinx.v.
in [ 7 : 0 ] [Inputs] |
Definition at line 929 of file primitives_xilinx.v.
out [ 7 : 0 ] [Outputs] |
Definition at line 930 of file primitives_xilinx.v.
u0 xilinx_inc8 [Components] |
C_ADDSUB_V1_0 include [Includes] |
Definition at line 73 of file primitives_xilinx.v.
C_MUX_BUS_V1_0 include [Includes] |
Definition at line 74 of file primitives_xilinx.v.
C_COMPARE_V1_0 include [Includes] |
Definition at line 75 of file primitives_xilinx.v.
C_MUX_BIT_V1_0 include [Includes] |
Definition at line 76 of file primitives_xilinx.v.
C_MEM_DP_BLOCK_V1_0 include [Includes] |
Definition at line 77 of file primitives_xilinx.v.
C_REG_FD_V1_0 include [Includes] |
Definition at line 78 of file primitives_xilinx.v.