Ports | |
a | |
b | |
eq | |
a | |
b | |
eq | |
Includes | |
C_ADDSUB_V1_0 | |
C_MUX_BUS_V1_0 | |
C_COMPARE_V1_0 | |
C_MUX_BIT_V1_0 | |
C_MEM_DP_BLOCK_V1_0 | |
C_REG_FD_V1_0 | |
Inputs | |
a | [ 7 : 0 ] |
b | [ 7 : 0 ] |
a | [ 7 : 0 ] |
b | [ 7 : 0 ] |
Outputs | |
eq | |
eq | |
Components | |
u0 | xilinx_cmp8_eq |
Definition at line 90 of file primitives.v.
a [Ports] |
Definition at line 90 of file primitives.v.
b [Ports] |
Definition at line 90 of file primitives.v.
eq [Ports] |
Definition at line 90 of file primitives.v.
a [ 7 : 0 ] [Inputs] |
Definition at line 91 of file primitives.v.
b [ 7 : 0 ] [Inputs] |
Definition at line 91 of file primitives.v.
eq [Outputs] |
Definition at line 92 of file primitives.v.
a [Ports] |
Definition at line 188 of file primitives_xilinx.v.
b [Ports] |
Definition at line 188 of file primitives_xilinx.v.
eq [Ports] |
Definition at line 188 of file primitives_xilinx.v.
a [ 7 : 0 ] [Inputs] |
Definition at line 189 of file primitives_xilinx.v.
b [ 7 : 0 ] [Inputs] |
Definition at line 189 of file primitives_xilinx.v.
eq [Outputs] |
Definition at line 190 of file primitives_xilinx.v.
u0 xilinx_cmp8_eq [Components] |
Definition at line 193 of file primitives_xilinx.v.
C_ADDSUB_V1_0 include [Includes] |
Definition at line 73 of file primitives_xilinx.v.
C_MUX_BUS_V1_0 include [Includes] |
Definition at line 74 of file primitives_xilinx.v.
C_COMPARE_V1_0 include [Includes] |
Definition at line 75 of file primitives_xilinx.v.
C_MUX_BIT_V1_0 include [Includes] |
Definition at line 76 of file primitives_xilinx.v.
C_MEM_DP_BLOCK_V1_0 include [Includes] |
Definition at line 77 of file primitives_xilinx.v.
C_REG_FD_V1_0 include [Includes] |
Definition at line 78 of file primitives_xilinx.v.